JEDEC validates DDR3L and its 1.35V Posted on 20/06/2008 at 12:11 by Nicolas
- source: Xbit-labs
Before moving, the JEDEC had the time to validate an improvement called DDR3L which is part of the current DDR3 standard. It enables reducing the default voltage of 1.5V to 1.35V. Thus, this is a 10% reduction which may enable some to decrease energy use by 20% in many standard applications.
Modules equipped with DDR3L will be labeled ‘’PC3L’’ and they should function with current motherboards in an optimal way because the SPD (a small EEPROM memory which fits on memory modules) communicates the specifications of the module. The JC-42.3 memory committee which is the origin of DDR3L hopes to go even further (probably going as low as 1.25V) and that manufacturers develop designs which are sufficiently flexible to be able to benefit from other future low power products.
Before moving, the JEDEC had the time to validate an improvement called DDR3L which is part of the current DDR3 standard. It enables reducing the default voltage of 1.5V to 1.35V. Thus, this is a 10% reduction which may enable some to decrease energy use by 20% in many standard applications.