Xeon : Stepping E0, lower TDP Posted on 28/04/2008 at 08:57 by Nicolas
While Intel almost exclusively uses the C1 revision of the Yorkfield for the Core 2 Extreme and Quad (M1 for the Q9300 due to its L2 cache of 6 MB), the Xeon "Harpertown" and "Wolfdale-DP" which are destined for multiprocessor systems, are still based on aging C0 stepping.
This situation should soon evolve as the Santa Clara company has announced that there will be a new revision, the E0. The first samples are expected out on July 3rd and delivery in large volume should start in mid-October.
In both cases, new bios will be necessary for the support of these processors and the CPUID evolves from the previous 0x1067A to 0xA005b013. Only the TDP of the X5482 (quad core, 3200 MHz, the current most powerful) decreases from 150W to 120W, the other Xeons concerned already have a TDP equal or lower to this figure.
We will just have to see if the very expensive Core 2 Extreme QX9775 which equips the Skulltrail platform and is a carbon copy of the current X5482 will also be affected by these changes or if Intel will ignore it due to the low volume that it represents.
