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     32nm process will be very expensive
      Posted on 04/04/2007 at 01:22 by Nicolas - source: EETimes
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    wafer elpida ddr2EETimes has published an interesting article listing and describing the most important issues that manufacturer, such as VIA or Nvidia who conceive integrated circuits for themselves or tiers companies like TSMC, will have to face.

    If this article has to be examined with a critical eye because it doesn't take into account several factors such as the fast growing of some of the sub-segments or state grants (AMD with the state of New York for example), the analysis of our colleagues at least leads to some questions that seems to be currently without answers.

    The opinion of Synopsys' employees, company specialized in tools for the conception of electronic circuits, and of VLSI Research converges and indicates that fixed costs will go through the roof. They will represent a much more important part of production costs. Of course, higher fixed costs can be more easily recouped when variable costs diminish with smaller fabrication process. However, the first one progress faster than the second and it means that it will be imperative to always produce in greater quantities.

    There is also another problem: the more complex a circuit, the lower the yield. This is particularly true with new small fabrication processes. Return on investments might be heavily affected. We heard $20 to $50 million for 45nm circuits and approximately $75 million for 32 nm. The cost for the set up of an adequate "mask set" would be $9 million and this doesn't include the investment to build the factories and the R&D. They are respectively of $3 billion and $2.4 billion for a factory producing chips using 45 nm fabrication process and 300mm wafer. For 32 nm process, these would increase to $10 billion for the construction of the factory and $3 billion for the R&D.

    Some companies conceiving chips won't have the capacity to make such investments and could be tempted by the replacement of more complex processors by solutions embedding several dies. This maneuver will improve yield and increase the return on investments of production lines. We will probably also see more alliances between manufacturers like AMD and IBM who have set up a conjoint R&D department to cut risks and costs. Smaller companies who can't afford such investment will also have to merge, be bought or will simply disappear. This is all the more true that some technologies required to stay in the race are protected by patents and have very expensive entry tickets.

    Even Intel, one of the two companies quoted by EETimes with Samsung as capable of considering the change to 32nm, is well aware of the problem. The Santa Clara giant has already used multi-dies with the release of the Pentium D and recently with the Core 2 Quad.

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