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    July 11, 2011

     New step for PRAM!
      Posted on 30/06/2011 at 11:47 by Marc
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    There has just been a new breakthrough with phase-change memory (PCM) or phase-change random access memory (PRAM) with a new prototype from IBM capable of stocking two bits of memory per cell. This is an important step as it means improved density for PCM and therefore lower cost per bit, as is the case for MLC Flash which also stocks two bits per cell.

    As things stand however, the prototype is still a long way from coming onto the market – it’s a 64 MB chip engraved at 90nm, compared to 25nm for the latest flash memory. For now IBM is looking at 2016 for server applications and therefore has time to move the technology over to a finer engraving between now and then.

    As with Flash NOR or NAND memory, PCM is nonvolatile, meaning it retains data after its power supply has been closed off. Each cell contains chalcogenide materials which can go from an amorphous state (disordered molecules) to a crystalline state (molecules ordered according to a pattern). These two states differ with respect to their electrical resistivity, the level of which allows data to be read, it having been written by a change in state brought about by heat.

    IBM’s breakthrough centres around being about to manage intermediary states, giving a total of four states corresponding to 00, 01, 10 or 11 in binary terms. Haris Pozidis, who has been developing the technology at IBM, is working on the theory that it will eventually be possible to stock three bits per cell, or even four by changing the materials used.

    One of the problems that needs to be resolved quickly lies in managing how the resistance of cells develops over time. In using intermediary states, such memory is more sensitive to changes in the resistivity of a cell over time which can lead to read errors (reading 00 for example, when 01 has been stored). As a getaround to the problem, IBM has come up with an algorithm which doesn't use absolute resistance to measure the state but rather the relative resistance between cells. This allows IBM to achieve an error margin of around 1 in 100,000 after thirty seven days at room temperature, which should translate to around 10^15 (1 million billion) with “simple, low-redundancy error-correction codes” according to Pozidis, but for the moment the algorithm has only been used on a smaller test chip and on only 200,000 cells.

    PCM potentially has many advantages over flash, with IBM announcing write speeds improved by a factor of 100 with write latency of just 10 microseconds and a lifespan of at least ten million cycles. It remains to be seen if this promise will be fulfilled in practice between now and 2016!

    To recap, Samsung has been making PRAM since 2009, but for now with specs that limit it to use in mobile products. Hynix and Micron are also working on this type of memory.

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