After having announced a first NAND flash memory chip capable of stocking 3 bits per cell (3BPC MLC) in October 2009, the Intel / Micron joint venture IMFT (IM Flash Technologies), is back with a new chip of this type. The engraving process is down from 34nm to 25nm and capacities range from 4 to 8 GB.
This type of memory, also called TLC (triple-level cell) allows, notably, a reduction in die size for identical capacity because it measures only 131mm², against 167mm² for a chip with 2 bits per cell. For comparison, the TLC 4 GB chip at 34nm measured 126mm².
This chip is currently at the sample stage, while samples of the standard 25nm MLC were out in February and in production since May. This 25nm 3BPC nand flash should be in production before the end of the year. Note that for now, this type of memory is only available on USB keys, MP3 players and memory cards.
In effect, TLC MLC gives lower write performance and reduces the endurance of cells. Although no figure has been given for this chip, at the beginning of 2009 Micron was talking about performance levels being halved and cell endurance divided by 10, which is why it can’t be used with SSDs unless this
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