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AMD Bulldozer architecture
by Franck Delattre
Published on July 13, 2011

CMT technology (Cluster Multi-threading)
Bulldozer partly overturns the definition of what a core is in terms of how cores are implemented in current x86 architecture. The new AMD architecture is based on what AMD is calling a “Bulldozer module” which combines two integer cores. At the heart of the module, the two cores share a certain number of components:
- the front-end groups the fetch unit and instruction decoding as well as the L1 instruction cache which is supplied by these units;
- the floating point unit;
- the L2 cache.

While sharing an L2 cache between the cores is nothing new, sharing the other units is. Up until now each core had its own front-end. AMD seems to have chosen which units to share well: the units that make up the front-end are complex and costly in terms of transistors and power. Sharing them allows a reduction in these two elements. The FPU is also frequently used at a rate of under 50%, making it pertinent to share it between two cores. In the end, a module is a lot smaller and consumes less energy than two full cores, yet it maintains a similar level of performance. AMD is claiming 80% of the performance of two full cores for 50% of the silicon area.

A “Bulldozer” processor will therefore be made up of several of these modules, a memory controller, a bus controller and, on some models, an L3 cache. Of course AMD’s marketing language will not be based on modules but rather the number of cores. Thus the 8-core version of Bulldozer will be made up of 4 modules and Windows will see this as 8 logic units.

Looking a little closer, you can see the Bulldozer module as a 4-way “super core”, partially cut into two so as to be able to process two threads in parallel. AMD’s choices are quite distinct from those made by Intel, who have retained 4-way hyper-threaded “super cores” (SMT). It’s difficult to say which method is the best and no doubt depends on the type of application you’re using. SMT has the advantage of being very modular (a single thread can garner 100% of the core performance) and enables optimal use of the out of order engine (OoO). CMT involves a more marked sharing of resources for each thread but doesn’t increase modularity. AMD says that a single thread running on a module enjoys all the shared resources… which is true but half the dedicated resources remain unused.

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