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Review index:
AMD K10 architecture
by Franck Delattre
Published on September 27, 2007

In depth energy management
If there is one thing that Intel learned from the "Prescott" experience (see our report on Core architecture to refresh your memory), it’s that thermal dissipation has become a limiting factor of performance in modern architecture. The impact of this new parameter is such that the design is no longer guided by the potential performances that can be generated but rather by the relation between performance and the number of consumed watts.

At the same time as its architecture, AMD is introducing a new power consumption index called ACP (Average CPU Power), which has been announced as being the most representative of real dissipation than TDP, which more indicates the maximum power value. Of course, the ACP has values lower than the TDP. AMD is staying prudent in this area and plans on giving both figures.

AMD talks a lot about an essential point related to the power consumption of its processors. They remind us that there is an integrated memory controller and therefore it’s normal that more heat is generated than with products with separate controllers. AMD claims that this integration reduces the overall thermal envelop of the processor + northbridge combo compared to a solution with a separate controller. This is true, however, it overlooks the fact that heat is more concentrated on a smaller surface and is therefore more difficult to dissipate.


The K10 partly makes up for this defect by the separation of the power supply and the memory controller clock from the processor core, thus allowing their separate adjustment depending on the respective activities of the two sub-systems. Here, the K10 offers two mechanisms which manage multipliers (FID) and voltage (VID) : one for the CPU and another for the memory controller.
As for the core of the processor, there is an energy management system called, "Independent Dynamic Core Technology" which is based on dynamic and independent modulation of the frequency of each core. Its aim is to control the overall thermal envelop of the processor.

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