Intel P35 Express, FSB1333 and DDR3 (page 1: P35 Express)

Without having the dire need, Intel decided to renew its chipset line. If we won’t see the X38, successor to the i975X, before September, the P35 Express, which takes off where the P965 Express left off, has already been in stores now for several weeks. So what’s new?

The P35 Express

Just like the P965, and contrary to early rumours, the P35 is a 90nm chip. The MCH is composed of 45 million transistors, while the ICH and its 4.6 million transistors are made with the 130nm process. The TDP of the MCH is announced according to literature at values between 16 and 18 watts. This lacks precision and we also are missing other detailed information such as for what FSB and which memories this is valid. For comparison, the P965 is specified at 19W with a FSB of 1066 and DDR2-800.

In terms of functions, the first area that differentiates the P35 from the P965 is the FSB, because it officially supports a FSB1333 versus a 1066 for the latter, or a respective 333 and 266 MHz « Quad Pumped ». We should remember that the P965 was capable of going beyond its specifications as we could easily reach, 400 MHz or even 500 MHz in big overclockings of this chipset. The first processors which will support such bus speeds will be the Core 2 E6x50 series, coming out in mid July. We will then be able to find, amongst other things, an E6850 3 GHz at « only » $266, or a price between the current E6600 and E6700 ($224 and $316).

On paper, DDR2 memory management does not appear to have been reviewed with a maximum of DDR2-800 (or the maximum frequency certified by the JEDEC) and a controller equipped with Fast Memory Access like the P965. On the other hand, the P35 is the first chipset to support DDR3 memory, a type of memory, which we will come back to in detail in the following pages. The P35 is officially limited at DDR3-1066, although it can go much further in practice as is the case for the DDR2.

With PCI Express management via the northbridge, the MCH remains classic with 16 lines that can be attributed to a single port. The rest necessarily relies on the southbridge, the ICH, which goes from the version 8 to the version 9 on the P35 Express. The liaison between ICH and MCH is still done with a DMI bus at 2 GB/s (1 GB in each direction). Like the ICH8, it manages four PCI Express ports, has an integrated Ethernet Gigabit controller, and manages four SATA of AHCI 3 Gbits /s type. In its DH version, it controls a total of six SATA, while the R version allows management of Matrix Storage (RAID 0/1/5/10) on its six SATA, as well as two other new things, Rapid Recovery and Turbo Memory. It should also be noted that the SATA ports of the ICH6-R are Port Multiplier compatible and therefore can be split with an additional chip in order to manage several peripherals.

Just as a reminder, Matrix Storage gives an advantage compared to the competition, because it allows the creation of two RAID (0 and 1) with two drives, in order to combine security for sensitive data and otherwise higher performance. Rapid Recovery is only an improved mirroring that permits having a permanent clone or a non permanent clone, which is only updated upon request. Updates only take into account modified files.

Turbo Memory is actually the name given by Intel for technology already available on the Centrino Santa Rosa platform. Here, 1 to 4 GB are integrated to the PC via a PCI Express x1 format card, in order to use Vista’s ReadyDrive and ReadyBoost, which use this memory to faire office writing buffer as well as to stock data which is the most demanded by SuperFetch.