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Intel Core 2 Duo - Test
by Franck Delattre et Marc Prieur
Published on July 4, 2006

After Netburst
When Intel stopped Netburst, it found itself in a situation similar to the one in 2001 when it was defining the successor to P6 architecture. However, the development of Netburst differed from the requirements of 2001 and the new specifications constitute the base of Core.

  • Netburst showed that it was now harder and harder to design a micro architecture with the capacity of evolving in the long term (more than 5 years). Forecasts were going along with too much uncertainty and unknown parameters. To succeed Netburst, it was required to invest money and hopes in a new architecture. The new policy consists in a step by step evolution of an existing architecture which already provided good performances.

  • Intel also had to rid itself of the bad image of very power hungry processors. Now is the time for energy saving products with little heat and noise.

  • The objective was also not to have to maintain a parallel architecture for mobile platforms.
  • After reading the new specifications, everyone turned their attention to the Mobile architecture. It was already there, has evolved in parallel to the Netburst and has integrated to the P6 the innovations introduced by the desktop Netburst (quad-pumped bus, SSE2). A short pipeline allowed low power consumption. Almost all the elements were there to make Mobile the ideal successor to Netburst. It benefited from a very good reputation according to users who only wished it wasn´t only used on these platforms. They were so eager to see this, that there are more and more attempts to adapt it to desktop platforms despite Intel´s willingness to protect the Netburst from too fast a fall so that they will have time to prepare their next step.

    With the new specifications, Mobile will benefit from several improvements to increase performances and make it capable of ensuring Intel´s presence on all three PC platforms. Core architecture was born!
    Back to a unified architecture
    If the choice of Mobile for the base of the new Core answers to the requirement of an energy saving architecture, it still has to be adapted to needs of non mobile platforms. This is an original way of proceeding, because up until today desktop processors were adapted to mobile versions and not the other way around.

    Coming back to a unified architecture for all three platforms of course represents savings in production for Intel, but according to the manufacturer it will also facilitate developers work in not having to optimise their programs for several micro-architectures with different requirements…at least as long as they remain in Intel´s product line!
    And because of that, a common architecture means generic optimisations no longer specific to one or another processor. For example, the non generalisation of 64 bit extensions certainly curbed the use of this new mode, which was up until today not included in Intel´s Mobile architecture. Core includes for developers the following standard points:
  • SSE, SSE2, SSE3 and new Supplemental SSE3 instruction sets.
  • l’EM64T.
  • Virtualization technology.
  • It would have been a very interesting point to also have dual core on this list but unfortunately Intel is planning on releasing Core architecture on single core products. Too bad!

    Core architecture in a Conroe
    Priority to IPC
    Even if it is efficient, the difference between Mobile and the latest versions based on Netburst (and especially compared to the Athlon 64) isn´t big enough. Core has the ambition of getting back the performance leadership on the desktop platform and has to make several modifications to Mobile for this purpose.

    Core has a 14 stage processing pipeline (Mobile has 12). Such depth restricts the maximum functioning frequency. So it isn´t on the pipeline depth but on width that efforts were focused to reach a high IPC.

    Core inherited the dynamic Out-Of-Order execution engine of Mobile, and improved it by extending the processing capacity. Each processing unit of the Core can load, decode and execute up to 4 instructions per cycle. Mobile was only able to process 3. Core introduces the 4-wide dynamic execution engine.

    Increasing the instruction transfer rate constitutes an acceleration factor in itself, but it also provides a wider instruction window to the OOO engine that will facilitate its management of dependencies and in consequence its efficiency. We remind you that this was the same objective of optimisation of OOO functioning that has been at the origin of Hyper-Threading integration in Netburst.

    A wider execution engine means calculation units that are capable of processing a higher transfer rate of instructions compared to Mobile. The Core’s calculations units have been the focus for this point.

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    The plan and the problems of Netburst

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